Compact Low-Power High Slew-Rate CMOS Buffer Amplifier with Power Gating Technique
نویسندگان
چکیده
منابع مشابه
Compact Low-power High Slew-rate Cmos Buffer Amplifier with Power Gating Technique
A qualitative analysis of different parameters such as Phase noise, Slew rate and tranconductance by using power gating reduction technique is presented. The circuit achieves the large driving capability by employing simple comparators to sense the transients of the input to turn on the output stages, which are statically off in the stable state. The effect of the different number of transistor...
متن کاملA New Low-Voltage, Low-Power and High-Slew Rate CMOS Unity-Gain Buffer
Class-AB circuits, which are able to deal with currents several orders of magnitude larger than their quiescent current, are good candidates for low-power and high slew-rate analog design. This paper presents a novel topology of a class AB flipped voltage follower (FVF) that has better slew rate and the same power consumption as the conventional class-AB FVF buffer previously presented in liter...
متن کاملA new compact low-power high slew rate class AB CMOS buffer
In this paper a new compact CMOS class AB buffer is presented. Its simple implementation relies on the use of the Flipped Voltage Follower (FVF) [ I ] . Simulation results from a 0.35 pm CMOS technology are presented that prove the operating principle under low-power conditions. This buffer can also find application in testing of analog CMOS VLSI circuits, as the input capacitance can be very l...
متن کاملLow Power CMOS Off-Chip Drivers with Slew-rate Difference
This paper proposes an approach to reduce the short circuit current of CMOS off-chip drivers by individually controlling the input slew rates to the P and N channel transistors that drive the output pad. The slew rates are deliberately designed such that the N(P) transistor at the output stage will be turned off faster than the P(N) transistor is turned on for low-to-high (highto-low) output tr...
متن کاملA Rail-to-rail High Speed Class-ab Cmos Buffer with Low Power and Enhanced Slew Rate
A rail-to-rail class-AB CMOS buffer is proposed in this paper to drive large capacitive loads. A new technique is used to reduce the leakage power of class-AB CMOS buffer circuits without affecting dynamic power dissipation .The name of applied technique is LECTOR, which gives the high speed buffer with the reduced low power dissipation (1.05%) and reduced area (2.8%). The proposed buffer is si...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: International Journal of VLSI Design & Communication Systems
سال: 2014
ISSN: 0976-1527,0976-1357
DOI: 10.5121/vlsic.2014.5302